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Data Sheet, Rev 1.1, September 2009
TLE4998C3C
Programmable Linear Hall Sensor
Sensors
Never
stop
thinking.
Edition 2009-09 Published by Infineon Technologies AG, Am Campeon 1-12, 85579 Neubiberg, Germany
(c) Infineon Technologies AG 2009.
All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Revision History: Previous Version: Page Page 13 Page 15 Page 15 Page 25 General
2009-09 Data Sheet Rev 1.0
Rev 1.1
Subjects (major changes since last revision) Table 4: Footnote 3) adapted Table 5: Sensitivity drift description adapted Table 5: Footnote 3) adapted Table 14: Footnote 1) and 2) adapted Package nomenclature changed to PG-SSO-3-92
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1 1.1 1.2 1.3 2 2.1 2.2 2.3 2.4 3 4 5
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Target Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 6 7 7
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Principle of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Transfer Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Electrical, Thermal, and Magnetic Parameters . . . . . . . . . . . . . . . . . . . 13 Calculation of the Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 15 Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Magnetic Field Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Magnetic Field Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gain Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Offset Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DSP Input Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17 17 18 19 19 20 22
6
6.1 6.2 6.3 6.4 6.5 7 7.1 7.2 8 8.1 9 9.1 9.2 9.3 9.4 10 11 12 12.1 12.2 12.3
Data Sheet
Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Voltages Outside the Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 EEPROM Error Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Parameter Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Calibration Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Transfer Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming of Sensors with Common Supply Lines . . . . . . . . . . . . . . . 27 28 29 29 29
Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PG-SSO-3-92 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 SPC Output Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Basic SPC Protocol Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unit Time Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Master Pulse Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
32 32 34 35
Rev 1.1, 2009-09
12.4 12.5 12.6 12.7
Synchronous Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Synchronous Transmission Including Range Selection . . . . . . . . . . . . . . . Synchronous Mode with ID Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . Checksum Nibble Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
37 37 38 41
Data Sheet
5
Rev 1.1, 2009-09
Programmable Linear Hall Sensor
TLE4998C3C
1
1.1
Overview
Features
* SPC (Short PWM Code) protocol with enhanced interface features based on SENT (Single Edge Nibble Transmission, defined by SAE J2716) * 20-bit Digital Signal Processing (DSP) * Digital temperature compensation * 16-bit overall resolution * Operates within automotive temperature range * Low drift of output signal over temperature and lifetime * Programmable parameters stored in EEPROM with single-bit error correction: - SPC protocol modes: synchronous transmission, dynamic range selection, ID selection mode - SPC unit time - Magnetic range and sensitivity (gain), polarity of the output slope - Offset - Bandwidth - Clamping levels - Customer temperature compensation coefficients - Memory lock * Re-programmable until memory lock * Supply voltage 4.5 - 5.5 V (4.1 - 16 V extended range) * Operation between -200 mT and +200 mT within three ranges * Reverse-polarity and overvoltage protection for all pins * Output short-circuit protection * On-board diagnostics (overvoltage, EEPROM error, start up) * Output of internal magnetic field values and temperature * Programming and operation of multiple sensors with common power supply * Two-point calibration of magnetic transfer function without iteration steps * High immunity against mechanical stress, EMC, ESD * Package with two capacitors: 47nF (VDD to GND) and 4.7nF (OUT to GND) Type TLE4998C3C Marking 98C3C Ordering Code SP000481482 Package
PG-SSO-3-9x
PG-SSO-3-92
Data Sheet
6
Rev 1.1, 2009-09
TLE4998C3C Overview 1.2 Target Applications
* Robust replacement of potentiometers - No mechanical abrasion - Resistant to humidity, temperature, pollution and vibration * Linear and angular position sensing in automotive applications such as pedal position, suspension control, throttle position, headlight levelling, and steering torque sensing * Sensing of high current for battery management, motor control, and electronic fuses
1.3
Pin Configuration
Figure 1 shows the location of the Hall element in the chip and the distance between Hall probe and the surface of the package.
2.67
B A
1.53
0.2 B
d
Center of sensitive area
Branded Side Hall-Probe
1
2
3
0.2 A
d: Distance chip to upper side of IC 0.3 0.05 mm
AEP03538
Figure 1 Table 1 Pin No. 1 2 3
TLE4998x3C Pin Configuration and Hall Cell Location TLE4998C3C Pin Definitions and Functions Symbol Function Supply voltage / programming interface Ground Output / programming interface
VDD GND OUT
Data Sheet
7
Rev 1.1, 2009-09
TLE4998C3C General
2
2.1
General
Block Diagram
Figure 2 shows a simplified block diagram.
VDD
Bias
Supply EEPROM
A D
Interface
TST
*)
spinning HALL
DSP
Temp. Sense
A D
OUT SPC
GND ROM
Figure 2 Block diagramm
*) TLE4998 C4 only
2.2
Functional Description
The linear Hall IC TLE4998C3C has been designed specifically to meet the requirements of highly accurate angle and position detection as well as for current measurement applications. Two capacitors are integrated on the lead frame, making this sensor especially suitable for applications with demanding EMC requirements. The sensor provides a digital SPC (Short PWM Code) signal, based on the standardized SENT (Single Edge Nibble Transmission, SAE J2716) protocol. The SPC protocol allows transmissions initiated by the ECU. Two further operation modes are available: * "range selection" for dynamical switching of the measurement range during operation * "ID selection" to build a bus system with up to 4 ICs on a single output line and a common supply, which can be individually accessed by the ECU. Each transmission sequence contains an adjustable number of nibbles representing the magnetic field, the temperature value and a status information of the sensor. The
Data Sheet 8 Rev 1.1, 2009-09
TLE4998C3C General
interface is further described in Chapter 12. The output stage is an open-drain driver pulling the output pin to low only. Therefore, the high level needs to be obtained by an external pull-up resistor. This output type has the advantage that the receiver may use an even lower supply voltage (e.g. 3.3 V). In this case the pull-up resistor must be connected to the given receiver supply. The IC is produced in BiCMOS technology with high voltage capability, and it also has reverse-polarity protection. Digital signal processing using a 16-bit DSP architecture together with digital temperature compensation guarantee excellent long-time stability compared to analog compensation methods. While the overall resolution is 16 bits, some internal stages work with resolutions up to 20 bits.
2.3
Principle of Operation
* A magnetic flux is measured by a Hall-effect cell * The output signal from the Hall-effect cell is converted from analog to digital * The chopped Hall-effect cell and continuous-time A/D conversion ensure a very low and stable magnetic offset * A programmable low-pass filter to reduce noise * The temperature is measured and A/D converted, too * Temperature compensation is done digitally using a second-order function * Digital processing of output value is based on zero field and sensitivity value * The output value range can be clamped by digital limiters * The final output value is represented by the data nibbles of the SPC protocol
Data Sheet
9
Rev 1.1, 2009-09
TLE4998C3C General 2.4 Transfer Functions
The examples in Figure 3 show how different magnetic field ranges can be mapped to the desired output value ranges. * Polarity Mode: - Bipolar: Magnetic fields can be measured in both orientations. The limit points do not necessarily have to be symmetrical around the zero field point - Unipolar: Only north- or south-oriented magnetic fields are measured
* Inversion: The gain can be set to both positive and negative values
OUT12 / OUT16 OUT12 / OUT16
4095 / 65535
B (mT)
50
B (mT)
B (mT)
200
OUT12 / OUT16
4095 / 65535
4095 / 100 65535
0
0
0
0
0
0
-50
-100
-200
Example 1: - Bipolar
Example 2: - Unipolar - Big offset
Example 3: - Bipolar - Inverted (neg. gain)
Figure 3
Examples of Operation
Data Sheet
10
Rev 1.1, 2009-09
TLE4998C3C Maximum Ratings
3
Table 2 Parameter
Maximum Ratings
Absolute Maximum Ratings Symbol TST TJ VDD IDDov IDDrev - 40 - 40 -18 -1 -13) Limit Values min. max. 150 1701) 18 15 0 184) unlimited 8 C C V mA mA V T kV According HBM JESD22-A114-B 5)
2)
Unit
Notes
Storage temperature Junction temperature Voltage on VDD pin with respect to ground Supply current @ overvoltage VDD max. Reverse supply current @ VDD min.
Voltage on output pin with VOUT respect to ground Magnetic field ESD protection
1) 2)
BMAX VESD
For limited time of 96 h. Depends on customer temperature lifetime cycles. Please ask for support by Infineon Higher voltage stress than absolute maximum rating, e.g. 150% in latch-up tests is not applicable. In such cases, Rseries 100 for current limitation is required IDD can exceed 10 mA when the voltage on OUT is pulled below -1 V (-5 V at room temperature)
3) 4) 5)
VDD = 5 V, open drain permanent low, for max. 10 minutes
100 pF and 1.5 k
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Data Sheet
11
Rev 1.1, 2009-09
TLE4998C3C Operating Range
4
Operating Range
The following operating conditions must not be exceeded in order to ensure correct operation of the TLE4998C3C. All parameters specified in the following sections refer to these operating conditions, unless otherwise indicated.
Table 3 Parameter
Operating Range Symbol Limit Values min. max. 5.5 162) 18 5 125 1504) V V V k mA C For 5000 h For 1000 h not additive Extended range VDD 4.5 4.11) 1 0 - 40 Unit Notes
Supply voltage
Output pull-up voltage3) Vpull-up Load resistance3) Output current3) Junction temperature RL IOUT TJ
1) 2) 3) 4)
For reduced output accuracy For supply voltages > 12 V, a series resistance Rseries 100 is recommended Output protocol characteristics depend on these parameters, RL must be according to max. output current For reduced magnetic accuracy; extended limits are taken for characteristics
Keeping signal levels within the limits specified in this table ensures operation without overload conditions.
Data Sheet
12
Rev 1.1, 2009-09
TLE4998C3C Electrical, Thermal, and Magnetic Parameters
5
Table 4 Parameter
Electrical, Thermal, and Magnetic Parameters
Electrical Characteristics Symbol CVDD CL tSPC IDD IOUTsh RthJA RthJC tPon VDDpon ZOUT tfall trise VOUTsat Limit Values min. typ. max. 3 20 2 47 4.7 6 95 1 8 Unit Notes nF nF ms mA mA VOUT = 5 V, max. 10 minutes Ceramic Ceramic Unit time 3s1)
VDD-GND capacitor OUT-GND capacitor SPC transmission time Supply current Output current @ OUT shorted to supply lines Thermal resistance Power-on time2) Power-on reset level Output impedance Output fall time Output rise time Output low saturation voltage Output noise (rms)
1) 2)
190 41 0.7 15 3.6 40 20 0.3 0.2 1 2 20 4 70 4 0.6 0.4 2.5
K/W Junction to air K/W Junction to case ms V k s s V
3)
5% target out value 1% target out value
VOUT 4.5 V to 0.5 V 4) VOUT 0.5 V to 4.5 V 4)5) IOUTsink = 5 mA IOUTsink = 2.2 mA
OUTnoise -
LSB12 6)
Transmission time depends on the data values being sent and on int. RC oscillator frequ. variation of +/- 20% Response time to set up output data at power on when a constant field is applied. The first value given has a 5% error, the second value has a 1% error. Measured with 640-Hz low-pass filter Output impedance is measured VOUT/IOUT (VOUT=12V ... 2.6V) at VDD = 5V, open-drain high state For VDD = 5 V, RL = 2.2 k, CL = 4.7 nF (in package), at room temperature, not considering condensator tolerance or influence of external circuitry
3) 4)
Data Sheet
13
Rev 1.1, 2009-09
TLE4998C3C Electrical, Thermal, and Magnetic Parameters
5)
Depends on external RL and CL
VOUT
*)
t HIGH tlow
VDD 90% VDD
10% VDD VOUTsat
*)
RL to VDD assumed trise
tfall
6)
t
Range 100 mT, Gain 2.23, internal LP filter 244 Hz, B = 0 mT, T = 25 C
Data Sheet
14
Rev 1.1, 2009-09
TLE4998C3C Electrical, Thermal, and Magnetic Parameters
Calculation of the Junction Temperature The internal power dissipation PTOT of the sensor increases the chip junction temperature above the ambient temperature. The power multiplied by the total thermal resistance RthJA (Junction to Ambient) added to TA leads to the final junction temperature. RthJA is the sum of the addition of the two components, Junction to Case and Case to Ambient.
RthJA = RthJC + RthCA TJ = TA + T T = RthJA x PTOT = RthJA x ( VDD x IDD + VOUT x IOUT )
Example (assuming no load on Vout): - VDD = 5 V - IDD = 8 mA - T = 190 [K/W] x (5 [V] x 0.008 [A] + 0 [VA] ) = 7.6 K
IDD , IOUT > 0, if direction is into IC
For moulded sensors, the calculation with RthJC is more adequate. Magnetic Parameters Table 5 Parameter Sensitivity Sensitivity drift Magnetic field range Integral nonlinearity Magnetic offset Magnetic offset drift Magnetic hysteresis
1) 2) 3)
Magnetic Characteristics Symbol Limit Values min. S1) S MFR INL BOS BOS BHYS 8.2 50 typ. 80 100 1 4)
Unit max.
Notes
245 LSB12/ Programmable2) mT 150 ppm/ C 200 mT 0.1 5 10 %MFR 400 T T
3)
See Figure 4 Programmable 5)
6)8) 7)8)
0.05
T / C Error band8)
9)
Defined as OUT / B Programmable in steps of 0.024% For any 1st and 2nd order polynomial, coefficient within definition in Chapter 8. Valid for characterization at 0h
Data Sheet
15
Rev 1.1, 2009-09
TLE4998C3C Electrical, Thermal, and Magnetic Parameters
4) 5) 6) 7) 8) 9)
This range is also used for temperature and offset pre-calibration of the IC Depending on offset and gain settings, the output may already be saturated at lower fields Gain setup is 1.0 In operating temperature range and over lifetime Measured at 100 mT range Measured in 100 mT range, Gain = 1, room temperature
S ~ S(T)/S0-1
max. pos. TC-error TCmax = S/T S0
0 Tmin T0 Tmax
Tj
max. neg. TC-error TCmin = S/T
Figure 4
Sensitivity drift
Data Sheet
16
Rev 1.1, 2009-09
TLE4998C3C Signal Processing
6
Signal Processing
The signal flow diagram in Figure 5 shows the signal path and data-processing algorithm.
Range Hall Sensor Temperature Sensor
A D
LP
Gain +
Limiter
(Clamp)
X
X
Protocol Generation
out
Offset TC 2
X X
A D
+ TC 1
1
X
+
Stored in EEPROM Memory
-T0
Temperature Compensation
Figure 5
Signal Processing Flow
Magnetic Field Path * The analog output signal of the chopped Hall-effect cell is converted to a digital signal in the continuous-time A/D converter. The range of the chopped A/D converter can be set in several steps either by EEPROM settings or dynamically by the master in the dynamic range mode (see Table 6). This gives a suitable level for the A/D converter * After the A/D conversion, a digital low-pass filter reduces the bandwidth (Table 10) * A multiplier amplifies the value depending on the gain (see Table 8) and temperature compensation settings * The offset value is added (see Table 9) * A limiter reduces the resulting signal to 16 bits (see Chapter 12) and feeds the Protocol Generation stage Temperature Compensation (Details are listed in Chapter 8) * The output signal of the temperature cell is also A/D converted
Data Sheet 17 Rev 1.1, 2009-09
TLE4998C3C Signal Processing
* The temperature is normalized by subtraction of the reference temperature T0 value (zero point of the quadratic function) * The linear path is multiplied with the TC1 value * In the quadratic path, the temperature difference to T0 is squared and multiplied with the TC2 value * Both path outputs are added together and multiplied with the Gain value from the EEPROM
6.1
Magnetic Field Ranges
The working range of the magnetic field defines the input range of the A/D converter. It is always symmetrical around the zero field point. Any two points in the magnetic field range can be selected to be the end points of the output value. The output value is represented within the range between the two points. In the case of fields higher than the range values, the output signal may be distorted. In case of synchronous mode and ID selection mode the range must be set accordingly (R=0/1/3) before the calibration of offset and gain. Table 6 Range Low Mid High
1)
Range Setting Range in mT1) 50 100 200 Parameter R 3 12) 0
Ranges do not have a guaranteed absolute accuracy. The temperature pre-calibration is performed in the mid range (100 mT) Setting R = 2 is not used, internally changed to R = 1
2)
Table 7 Parameter Register size
Range Symbol Limit Values min. max. 2 bit Unit Notes
R
Data Sheet
18
Rev 1.1, 2009-09
TLE4998C3C Signal Processing 6.2 Gain Setting
The overall sensitivity is defined by the range and the gain setting. The output of the ADC is multiplied with the Gain value. Table 8 Parameter Register size Gain range
1)
Gain Symbol Limit Values min. max. 15 - 4.0 3.9998 244.14 bit ppm Unsigned integer value
1)2)
Unit
Notes
G Gain
Gain quantization steps Gain
Corresponds to 1/4096
For Gain values between - 0.5 and + 0.5, the numerical accuracy decreases To obtain a flatter output curve, it is advisable to select a higher range setting A gain value of +1.0 corresponds to typical 32 LSB12/mT sensitivity (100 mT range, not guaranteed). It is crucial to do a final calibration of each IC within the application using the Gain/OUTOS value
2)
The Gain value can be calculated by:
:
( G - 16384 ) Gain = ----------------------------4096
6.3
Table 9 Parameter
Offset Setting
Offset Symbol Limit Values min. max. 15 -16384 16383 1 bit LSB12 LSB12 Unsigned integer value
1)
The offset value corresponds to an output value with zero field at the sensor. Unit Notes
Register size Offset range Offset quantization steps
1)
OS OUTOS
OUTOS
Infineon pre-calibrates the samples at zero field to 50% output value (100 mT range), but does not guarantee the value. Therefore it is crucial to do a final calibration of each IC within the application
The offset value can be calculated by:
OUT OS = OS - 16384
Data Sheet
19
Rev 1.1, 2009-09
TLE4998C3C Signal Processing 6.4 DSP Input Low-Pass Filter
A digital low-pass filter is placed between the Hall A/D converter and the DSP, and can be used to reduce the noise level. The low-pass filter has a constant DC amplification of 0 dB (Gain of 1), which means that its setting has no influence on the internal Hall ADC value. The bandwidth can be set to any of 8 values. Table 10 0 1 2 3 4 5 6 7
1)
Low Pass Filter Setting Cutoff frequency in Hz (-3dB point)1) 80 240 440 640 860 1100 1390 off
Note: Parameter LP
As this is a digital filter running with an RC-based oscillator, the cutoff frequency may vary within 20%
Table 11 Parameter Register size
Low-Pass Filter Symbol Limit Values min. max. 3 - 20 + 20 bit % Unit Notes
Corner frequency variation
LP f
Note: In range 7 (filter off), the output noise increases.
Data Sheet
20
Rev 1.1, 2009-09
TLE4998C3C Signal Processing
Figure 6 shows the filter characteristics as a magnitude plot (the highest setting is marked). The "off" position would be a flat 0 dB line. The update rate after the low-pass filter is 16 kHz.
0
-1
Magnitude (dB)
-2 -3
-4
-5
-6 101
10
2
10
3
Frequency (Hz)
Figure 6 DSP Input Filter (Magnitude Plot)
Data Sheet
21
Rev 1.1, 2009-09
TLE4998C3C Signal Processing 6.5 Clamping
The clamping function is useful for separating the output range into an operating range and error ranges. If the magnetic field is exceeding the selected measurement range, the output value OUT is limited to the clamping values. Any value in the error range is interpreted as an error by the sensor counterpart. Table 12 Parameter Register size Clamping value low Clamping value high Clamping quantization steps
1) 2) 3)
Clamping Symbol Limit Values min. max. 2x6 0 1023 64512 65535 1024 bit LSB16 LSB16 LSB16 (0...63)
1) 1) 2) 3)
Unit
Notes
CL,CH OUTCL OUTCH OUTCx
For CL = 0 and CH = 63 the clamping function is disabled OUTCL < OUTCH mandatory Quantization starts for CL at 0 LSB16 and for CH at 65535 LSB16
The clamping values are calculated by: Clamping value low (deactivated if CL=0):
OUT CL = CL 64 16
Clamping value high (deactivated if CH=63):
OUT CH = ( CH + 1 ) 64 16 - 1
Data Sheet
22
Rev 1.1, 2009-09
TLE4998C3C Signal Processing
Figure 7 shows an example in which the magnetic field range between Bmin and Bmax is mapped to output values between 10240 LSB16 and 55295 LSB16.
OUT (LSB16) 65535 Error range
55295
OUTCH
Operating range
10240
OUTCL
Error range Bmin Bmax
0
B (mT)
Figure 7 Clamping Example
Note: The clamping high value must be above the low value.
Data Sheet
23
Rev 1.1, 2009-09
TLE4998C3C Error Detection
7
Error Detection
Different error cases can be detected by the On-Board Diagnostics (OBD) and reported to the microcontroller in the status nibble (see Chapter 12).
7.1
Table 13 Parameter
Voltages Outside the Operating Range
Overvoltage Symbol Limit Values min. typ. max. 18.35 V
1)
The output signals an error condition if VDD crosses the overvoltage threshold level. Unit Notes
Overvoltage threshold
1)
VDDov
16.65 17.5
Overvoltage bit activated in status nibble, output stays in "off" state (high ohmic)
7.2
EEPROM Error Correction
The parity method is able to correct a single bit in the EEPROM line. One other single bit error in another EEPROM line can also be detected, but not corrected. In an uncorrectable EEPROM failure, the open drain stage is disabled and kept in the off state permanently (high ohmic/sensor defect).
Data Sheet
24
Rev 1.1, 2009-09
TLE4998C3C Temperature Compensation
8
Temperature Compensation
The magnetic field strength of a magnet depends on the temperature. This material constant is specific for the different magnet types. Therefore, the TLE4998C3C offers a second-order temperature compensation polynomial, by which the Hall signal output is multiplied in the DSP. There are three parameters for the compensation: * Reference temperature T0 * A linear part (1st order) TC1 * A quadratic part (2nd order) TC2 The following formula describes the sensitivity dependent on the temperature in relation to the sensitivity at the reference temperature T0:
S TC ( T ) = 1 + TC 1 x ( T - T 0 ) + TC 2 x ( T - T0 )
2
For more information, please refer to the signal processing flow in Figure 5. The full temperature compensation of the complete system is done in two steps: 1. Pre-calibration in the Infineon final test The parameters TC1, TC2, T0 are set to maximally flat temperature characteristics with respect to the Hall probe and internal analog processing parts. 2. Overall system calibration The typical coefficients TC1, TC2, T0 of the magnetic circuitry are programmed. This can be done deterministically, as the algorithm of the DSP is fully reproducible. The final setting of the TC1, TC2, T0 values depend on the pre-calibrated values. Table 14 Parameter Register size TC1 1st order coefficient TC1 Quantization steps of TC1 Register size TC2 2nd order coefficient TC2 Quantization steps of TC2 Reference temp. Quantization steps of T0
1)
Temperature Compensation Symbol Limit Values Unit min. max. 9 15.26 -4 - 48 1 8 4 0.119 64 bit ppm/ C ppm/ C bit ppm/ C ppm/ C C C
3)
Notes Unsigned integer values
1)
TL TC1 qTC1 TQ TC2 qTC2 T0 qT0
-
-1000 2500
Unsigned integer values
2)
Relative range to Infineon TC1 temperature pre-calibration, the maximum adjustable range is limited by the register-size and depends on specific pre-calibrated TL setting, full adjustable range: -2441 to +5355 ppm/C Relative range to Infineon TC2 temperature pre-calibration, the maximum adjustable range is limited by the register-size and depends on specific pre-calibrated TQ setting, full adjustable range: -15 to +15 ppm/C2
2)
Data Sheet
25
Rev 1.1, 2009-09
TLE4998C3C Temperature Compensation
3)
Handled by algorithm only (see Application Note)
8.1
Parameter Calculation
The parameters TC1 and TC2 may be calculated by:
TL - 160 TC 1 = ---------------------- x 1000000
65536
TQ - 128 TC 2 = ----------------------- x 1000000
8388608 Now the digital output for a given field BIN at a specific temperature can be calculated by: B IN OUT = 2 ------------ x S TC x S TCHall x S 0 x 4096 + OUT OS B FSR BFSR is the full-range magnetic field. It is dependent on the range setting (e.g 100 mT). S0 is the nominal sensitivity of the Hall probe times the Gain factor set in the EEPROM. STC is the temperature-dependent sensitivity factor calculated by the DSP. STCHall is the temperature behavior of the Hall probe. The pre-calibration at Infineon is performed such that the following condition is met:
S TC ( T J - T 0 ) x S TCHall ( T J ) 1
Within the application, an additional factor BIN(T) / BIN(T0) is given due to the magnetic system. STC then needs to be modified to STCnew so that the following condition is satisfied:
B IN ( T ) -------------------- x S TCnew ( T ) x S TCHall ( T ) S TC ( T ) x S TCHall ( T ) 1 B IN ( T 0 )
Therefore, the new sensitivity parameters STCnew can be calculated from the precalibrated setup STC using the relationship:
B IN ( T ) -------------------- x S TCnew ( T ) S TC ( T ) B IN ( T 0 )
Data Sheet
26
Rev 1.1, 2009-09
TLE4998C3C Calibration
9
Calibration
For the calibration of the sensor, a special hardware interface to a PC is required. All calibration and setting bits can be temporarily written into a Random Access Memory (RAM). This allows the EEPROM to remain untouched during the entire calibration process, since the number of the EEPROM programming cycles is limited. Therefore, this temporary setup (using the RAM only) does not stress the EEPROM. The digital signal processing is completely deterministic. This allows a two-point calibration to be performed in one step without iterations. After measuring the Hall output signal for the two end points, the signal processing parameters Gain and Offset can be calculated. Table 15 Parameter Calibration Characteristics Symbol Limit Values min. Ambient temperature at TCAL calibration 2 point Calibration accuracy1)
1)
Unit C LSB12 LSB12
Notes
max. 30 8 8
10
OUTCAL1 -8 OUTCAL2 -8
Position 1 Position 2
Corresponds to 0.2% accuracy in each position
Data Sheet
27
Rev 1.1, 2009-09
TLE4998C3C Calibration 9.1 Calibration Data Memory
When the MEMLOCK bits are programmed (two redundant bits), the memory content is frozen and may no longer be changed. Furthermore, the programming interface is locked out and the chip remains in application mode only, preventing accidental programming due to environmental influences.
Column Parity Bits
Row Parity Bits
User-Calibration Bits
Pre-Calibration Bits
Figure 8
EEPROM Map
A matrix parity architecture allows automatic correction of any single-bit error. Each row is protected by a row parity bit. The sum of bits set (including this bit) must be an odd number (ODD PARITY). Each column is additionally protected by a column parity bit. Each bit in the even positions (0, 2, etc.) of all lines must sum up to an even number (EVEN PARITY), and each bit in the odd positions (1, 3, etc.) must have an odd sum (ODD PARITY). The parity column must have an even sum (EVEN PARITY). This system of different parity calculations also protects against many block errors (such as erasing a full line or even the whole EEPROM). When modifying the application bits (such as Gain, Offset, TC, etc.), the parity bits must be updated. As for the column bits, the pre-calibration area must be read out and considered for correct parity generation as well. Note: A specific programming algorithm must be followed to ensure data retention. A detailed separate programming specification is available on request.
Data Sheet
28
Rev 1.1, 2009-09
TLE4998C3C Calibration
Table 16 Parameter Number of EEPROM programming cycles Programming Characteristics Symbol Limit Values min. max. 10 30 150 26 Cycles1) Programming allowed only at start of lifetime C ms Bit Bit For complete memory 2) All active EEPROM bits All parity EEPROM bits Unit Notes
NPRG
10 100
Ambient temperature at TPRG programming Programming time Calibration memory Error Correction
1) 2)
tPRG
-
1 cycle is the simultaneous change of 1 bit Depending on clock frequency at VDD, write pulse 10 ms 1%, erase pulse 80 ms 1%
9.2
Programming Interface
The VDD pin and the OUT pin are used as a two-wire interface to transmit the EEPROM data to and from the sensor. This allows: * Communication with high data reliability, parity protected * The bus-type connection of several sensors and separate programming via the OUT pin
9.3
Data Transfer Protocol
The data transfer protocol is described in a separate document (User Programming Description), available on request.
9.4
Programming of Sensors with Common Supply Lines
In many automotive applications, two sensors are used to measure the same parameter. This redundancy makes it possible to continue operation in an emergency mode. If both sensors use the same power supply lines, they can be programmed together in parallel.
Data Sheet
29
Rev 1.1, 2009-09
TLE4998C3C Application Circuit
10
Application Circuit
Figure 9 shows the connection of multiple sensors to a microcontroller.
Sensor Module
Voltage Supply Sensor
Voltage Supply C
ECU Module
VDD
VDD
C
Vdd
2k2 50
TLE out 4998x3C
GND
OUT1
CCin1
1n GND
VGND CCin2
2k2
V DD
TLE out 4998x3C
GND
OUT2
50
optional
1n
Figure 9
Application Circuit
Note: For calibration and programming, the interface has to be connected directly to the OUT pin. The application circuit shown should be regarded as an example only. It will need to be adapted to meet the requirements of other specific applications. Further information is given in Chapter 12.
Data Sheet
30
Rev 1.1, 2009-09
TLE4998C3C PG-SSO-3-92 Package Outlines
11
PG-SSO-3-92 Package Outlines
B 1 x 45 1
0.1 MAX.
5.34 0.05 5.16 0.08 1.9 MAX.
0.2 2A
3.38 0.06
1.905 B
1.905 B
3.710.08
1-0.1 0.25 0.05
7
0.65 0.1 (0.25)
7.070.1
0.2 B 0.2 B
(2.68)
5.670.1
0.4 0.05 1.670.05
1 MAX.1)
2x
(2.2)
A
A
7 2
5.34 0.05 5.16 0.08 0.9 0.05 0.2 B 0.2 B 3x
1.2 0.05
1.655
1
2
3
2 x 1.655 = 3.31 A-A
(1.75)
15 2
(0.52)
B-B 7 45 1
(0.9)
(1.75) (4.35)
Capacitor (1.75)
C-C
Burr MAX 0.15 Burr MAX 0.15
B 0.2
5.16 0.08
Burr MAX 1.1
12.7 1
2C
(14.8) (Useable Length) 23.8 0.5
38 MAX.
Burr MAX 1.1 18 0.5 6 0.5
C 2.2 0.05
9 +0.75 -0.5
C A 0.25 -0.15 0.39 0.1
P/PG-SSO-3-9x-PO V07
0.870.05
0.1
(8.17)
0.6 MAX. 1.9 MAX.
0.2 +0.04 0.35 0.05
7 1-1
Adhesive Tape Tape
6.35 0.4 12.7 0.3 Total tolerance at 10 pitches 1 1) No solder function area
4 0.3
Figure 10
Data Sheet
PG-SSO-3-92 (Plastic Green Single Small Outline Package)
31 Rev 1.1, 2009-09
TLE4998C3C SPC Output Definition
12
SPC Output Definition
The sensor supports a SPC (Short PWM Code) protocol, which enhances the standardized SENT protocol (Single Edge Nibble Transmission) defined by SAE J2716. SPC enables the use of enhanced protocol functionality due to the ability to select between "synchronous", "range selection" and "ID selection" protocol mode. The following tables give an overview of relevant registers to chose the appropriate SPC mode. Table 17 Parameter Protocol register ID register
1)
SPC Mode Registers Symbol Limit Values min. max. 2 2 bit bit
1)
Unit
Notes
P ID
The ID register is only actively used in ID selection mode.
Table 18 Mode Synchronous
SPC Mode Selection Parameter PMSB 0 1 1 Parameter PLSB Explanation No effect 0 1 Section 12.4 Section 12.5 Section 12.6
Dynamic range selection ID selection
12.1
Basic SPC Protocol Definition
As in SENT, the time between two consecutive falling edges defines the value of a four bit nibble, thus representing numbers between 0 and 15. The transmission time therefore depends on the transmitted data values.The single edge is defined by a 3 unit time (UT) low pulse on the output, followed by the high time defined in the protocol (nominal values, may vary by tolerance of internal RC oscillator, not including analog delay of the open drain output and influence by external circuitry, unit time programming see Section 12.2). All values are multiples of a unit time frame concept. A transfer consists of the following parts, depicted in Figure 11: A trigger pulse by the master, which initiates the data transmission A synchronization period of 56 UT (in parallel, a new sample is calculated) A status nibble of 12-27 UT Between 3 and 6 data nibbles of 12-27 UT each (number is programmable, see Table 20), representing the Hall value and temperature information * A CRC nibble of 12-27 UT * An end pulse to terminate the SPC transmission.
Data Sheet 32 Rev 1.1, 2009-09
* * * *
TLE4998C3C SPC Output Definition
Line idle
Master Trigger Pulse
Sync frame
Status Nibble
Data Nibble 1
Data Nibble 2
Data Nibble 3
OUT
Data Nibble 3
Data Nibble 4*
Data Nibble 5*
Data Nibble 6*
CRC Nibble
End Pulse
Available for next sample
* Data Nibbles 4 to 6 are optional (programmable )
Figure 11
SPC Frame
The CRC checksum includes the status nibble and the data nibbles and can be used to check the validity of the decoded data. The sensor is available for the next sample 90s after the falling edge of the end pulse. The sampling time (when values are taken for temperature compensation) is always defined as the beginning of the synchronization period. During this period, the resulting data is always calculated from scratch. The number of transmitted SPC nibbles is programmable to customize the amount of information sent by the sensor. The frame contains a 16bit Hall value and an 8bit temperature value in the full configuration. Table 19 Parameter Frame register Table 20 Frame Type 16bit Hall, 8bit temperature 16bit Hall 12bit Hall, 8bit temperature 12bit Hall Frame Register Symbol Limit Values min. max. 2 bit Unit Notes
F
Frame Selection Parameter F 0 1 2 3 Data Nibbles 6 nibbles 4 nibbles 5 nibbles 3 nibbles
The temperature is coded as an 8bit value. The value is transferred in unsigned integer format and corresponds to the range between -55C and +200C, so a transferred value of 55 corresponds to 0C. The temperature is additional information and although it is not
Data Sheet 33 Rev 1.1, 2009-09
TLE4998C3C SPC Output Definition
calibrated, may be used for a plausibility check, for example. Table 21 shows the mapping between junction temperature and the transmitted value in the SPC frame. Table 21 - 55C 0C 25C 200C
1)
Mapping of Temperature Value 0 55 80 255 Theoretical upper limit1) Theoretical lower limit1)
Junction Temperature Typ. Decimal Value from Sensor Note
Theoretical range of temperature values, not operating temperature range
The status nibble allows to check internal states and conditions of the sensor. * Depending on the selected SPC mode, the first two bits of the status nibble contain either the selected magnetic range or the ID of the sensor and allow therefore an easy interpretation of the received data. * The third bit is set to "1" for the first transmission after the sensor returns from an overvoltage operation with disabled open drain stage to regular operation (see Chapter 7.1). * The fourth bit is switched to "1" for the first data package transferred after a reset. This allows the detection of low-voltage situations or EMC problems of the sensor.
12.2
Unit Time Setup
The basic SPC protocol unit time granularity is defined as 3 s. Every timing is a multiple of this basic time unit. To achieve more flexibility, trimming of the unit time can be used to: * Allow a calibration trim within a timing error of less than 20% clock error (as given in SAE standard) * Allow a modification of the unit time for small speed adjustments This enables a setup of different unit times, even if the internal RC oscillator varies by 20%. Of course, timing values that are too low could clash with timing requirements of the application and should therefore be avoided, but in principle it is possible to adjust the timer unit for a more precise protocol timing. The output characteristic depends on the external load, the wiring, as well on the pull-up voltage and the temperature. Furthermore, sufficient driving capability of the sensor counterpart (ECU) is mandatory,
Data Sheet
34
Rev 1.1, 2009-09
TLE4998C3C SPC Output Definition
in order to be able to maintain the herein given master pulse requirements. All these parameters have considerable influence to find the proper unit time setup. Table 22 Parameter Register size Unit time
1) 2)
Predivider Setting Symbol Limit Values min. max. 4 2.0 3.88 bit s Predivider1) ClkUNIT=8MHz2) Unit Notes
Prediv tUNIT
Prediv default is decimal = 8 for 3 s nominal SPC unit time RC oscillator frequency variation +/- 20%
The nominal unit time is calculated by:
tUNIT = (Prediv + 16) / ClkUNIT Clk UNIT = 8MHz 20%
12.3
Master Pulse Requirements
An SPC transmission is initiated by a Master pulse on the OUT pin. To detect a low level on the OUT pin, the voltage must be below a threshold Vthf. The sensor detects that the OUT line has been released as soon as Vthr is crossed. Figure 12 shows the timing definitions for the master pulse. The master low time tmlow as well as the total trigger time tmtr are individual for the different SPC modes and are given in the subsequent sections. It is recommended to chose the typical master low time exactly between the minimum and the maximum possible time: tmlow,typ = (tmlow,min + tmlow,max) / 2. Although the allowed timing windows are larger for longer low times, the master should use a quarz clock source to provide a high timing accuracy (approx. 1%). For improved robustness, the master pulse can be adopted by the master once the effective unit time is known through the sensor's synchronisation period length. If the master low time exceeds the maximum low time, the sensor does not respond and is available for a next triggering
Data Sheet
35
Rev 1.1, 2009-09
TLE4998C3C SPC Output Definition
30s after the master pulse crosses Vthr. tmd,tot is the delay between internal triggering of the falling edge in the sensor and the triggering of the ECU. Table 23 Parameter Falling edge threshold Rising edge threshold Total trigger time Master Pulse Parameters Symbol Vthf Vthr tmtr Limit Values min. typ. 1.1 1.3 max. 1.7 16.3 70 113 7.9 V V UT UT UT s Synchronous mode 1)2) Dyn. range mode 1)2) ID selection mode 1)2)
3)
Unit Notes
1.25 1.43 1.8 10.8 13 46.6 56 75 90 5.8
Master delay time
1) 2)
tmd,tot
3.7
UT = Programmed nominal SPC unit time Trigger time in the sensor is fixed to the number of unit times specified in the "typ." column, but the effective trigger time varies due to the sensor's clock variation For VDD = 5 V, RL = 2.2 k, CL = 4.7 nF (in package), ECU trigger level Vth,ECU = 2V
3)
tmtr
OUT Vthf,max Vthf,min Vthr,max Vthr,min ECU trigger level
tmlow,min t mlow,max
Figure 12 SPC Master Pulse Timing
tmd,tot
Data Sheet
36
Rev 1.1, 2009-09
TLE4998C3C SPC Output Definition 12.4 Synchronous Transmission
In the "synchronous" mode, the sensor (slave) starts to transfer a complete data frame only after a low pulse is forced by the master on the OUT pin. This means that the data line is bidirectional - an open drain output of the microcontroller (master) sends the trigger pulse. The sensor then initiates a sync pulse and starts to calculate the new output data value. After the synchronization period, the data follows in form of a standard SENT frame, starting with the status, data and CRC nibbles. At the end, an end pulse allows the CRC nibble decoding and indicates that the data line is idle again. The timing diagram in Figure 11 visualizes a synchronous transmission. Table 24 Parameter Master low time
1)
Master Pulse Timing Requirements for Synchronous Mode Symbol tmlow 1.5 Limit Values min. typ. 2.75 max. 4 UT Unit1) Notes
UT = Programmed nominal SPC unit time
Sensor VDD OUT GND
CPU
Capcom-Unit Outpin (OD)
Figure 13
Bidirectional Communication in Synchronous Mode
12.5
Synchronous Transmission Including Range Selection
The low time duration of the master can be used to select the magnetic range of the sensor in SPC dynamic range selection mode. Table 25 Parameter Master low time Master Pulse Timing Requirements for Dynamic Range Mode Symbol tmlow 1.5 9 24
1)
Limit Values min. typ. 3.25 12 31.5 max. 5 15 39
Unit1) Notes UT UT UT Range = 200mT (R=0) Range = 100mT (R=1) Range = 50mT (R=3)
UT = Programmed nominal SPC unit time
Data Sheet
37
Rev 1.1, 2009-09
TLE4998C3C SPC Output Definition
The range information in the status bit can be used to determine whether the range has been properly identified. Changing the range takes some time due to the settling time of internal circuitry. The first sample after a range switch therefore still displays a value sampled with the old range setting, and the second transmission after changing the range displays the new range with reduced accuracy.
12.6
Synchronous Mode with ID Selection
This functionality is similar to the previous mode, but instead of switching the range of one sensor, one of up to four sensors are selectable on a bus (bus mode, 1 master with up to 4 slaves). This allows parallel connection of up to 4 sensors using only three lines (VDD, GND, OUT), as illustrated in Figure 14.
Sensor 1 VDD OUT GND Sensor 2 VDD OUT GND
CPU
Capcom-Unit Outpin (OD)
Figure 14
Bidirectional Communication with ID Selection
In this mode, the sensor starts to transfer complete packages only after receiving a master low pulse with an ID that is equivalent to the programmed value in its ID register. The mapping between master low time and ID is given in Table 26. A proper addressing requires the different sensors on a same bus to be programmed with the same nominal
Data Sheet
38
Rev 1.1, 2009-09
TLE4998C3C SPC Output Definition
SPC unit time. Alternatively, the sensors can be trimmed using the predivider settings to further reduce their relative unit time difference for more robustness. Table 26 Parameter Master low time Master Pulse Timing Requirements for ID Selection Mode Symbol tmlow 9 19 35.5 61.5
1)
Limit Values min. typ. 10.5 21 38 64.5 max. 12 23 40.5 67.5
Unit1) Notes UT UT UT UT ID = 0 ID = 1 ID = 2 ID = 3
UT = Programmed nominal SPC unit time
Data Sheet
39
Rev 1.1, 2009-09
TLE4998C3C SPC Output Definition
Table 27 Content of a SPC Data Frame (5-8 Nibbles)
omitted if F[1] = 1* omitted if F[0] = 1*
TRIGGER
SYNC
STATUS
H1
H2
H3
H4
T1
T2
CRC
bits
state state RR/ID RR/ID RR/ID
description
status information
description CRC calculation for all nibbles seed value: 0101 polynomial: X4+X3 +X2+1
10 01 00
startup condition in RR / of ID overvoltage in RR / of ID normal state in RR / of ID
bits 11 10 01 00
description +/- 50mT or ID #3 +/- 100mT or ID #2 +/- 100mT or ID #1 +/- 200mT or ID #0
bits
H1 H2 H3 H4
description1 decimal: OUT12
( = H1* 256+H2*16 +H3 )
description 2 decimal: OUT16
( = OUT12*16+H4 )
bits
T1 T2
description decimal: TEMP8
( = T1*16 + T2 )
1111 1111 1111 1111 1111 1111 1111 1111 1111 : 0000 0000 0000 0000 0000 0000 0000 0000 0000
1111 1111 1111 1111 1111 1111 1111 1111 1111 : 0000 0000 0000 0000 0000 0000 0000 0000 0000
1111 1111 1111 1111 1110 1110 1110 1110 1101 : 0010 0001 0001 0001 0000 0000 0000 0000 0000
1111 1110 : 0000 1111 1110 : 0000 1111 : 0000 1111 : 0000 1111 1110 : 0001 0000
4095 (FSR) 4095 4095 4095 4094 4094 4094 4094 4093 : 2 1 1 1 0 0 0 0 0
65535 (FSR) 65534 : 65520 65519 65518 : 65504 65503 : 32 31 : 16 15 14 : 1 0
1111 1111 1111 1111 1110 : 0101 0100 : 0011 0011 : 0000 0000
1111 1110 : 0000 1111 : 0000 1111 : 0111 0110 : 0001 0000
200 C 199 C : 185 C 184 C : 25 C 24 C : 0C -1C : -54 C -55 C
* The number of nibbles is programmed in the frame register F
Abbreviations: TRIGGER - trigger nibble SYNC - synchronization nibble STATUS - status nibble CRC - cyclic redundancy code nibble FSR - full scale range H1..4 - hall value T1..2 - temperature value OUT12 - 12 bit output value OUT16 - 16 bit output value TEMP8 - 8 bit temperature value
Data Sheet
40
Rev 1.1, 2009-09
TLE4998C3C SPC Output Definition 12.7 Checksum Nibble Details
The Checksum nibble is a 4-bit CRC of the data nibbles including the status nibble. The CRC is calculated using a polynomial x4 +x3 + x2 + 1 with a seed value of 0101. In the TLE4998C3C it is implemented as a series of XOR and shift operations as shown in the following flowchart:
CRC calculation
Pre-initialization :
GENERATOR = 1101
next Nibble
Nibble VALUE
SEED = 0101 , use this constant as old CRC value at first call
xor
SEED
<<1
VALUE xor VALUE xor SEED SEED
0
4x
xor only if MSB = 1
GENPOLY
Figure 15
CRC Calculation
A microcontroller implementation may use an XOR command plus a small 4-bit lookup table to calculate the CRC for each nibble.
// Fast way for any C with low memory and compute capabilities char Data[8] = {...}; // contains the input data (status nibble , 6 data nibble , CRC) // required variables and LUT char CheckSum, i; char CrcLookup[16] = {0, 13, 7, 10, 14, 3, 9, 4, 1, 12, 6, 11, 15, 2, 8, 5}; CheckSum= 5; // initialize checksum with seed "0101" for (i=0; i<7; i++) { CheckSum = CheckSum ^ Data[i]; CheckSum = CrcLookup[CheckSum]; } ; // finally check if Data [7] is equal to CheckSum
Figure 16
Example Code for CRC Generation
Data Sheet
41
Rev 1.1, 2009-09
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